This contains my bachelors thesis and associated tex files, code snippets and maybe more. Topic: Data Movement in Heterogeneous Memories with Intel Data Streaming Accelerator
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  1. #include <dml/dml.hpp>
  2. #include <vector>
  3. #include <iostream>
  4. #include <fstream>
  5. #include "benchmark.hpp"
  6. int main(int argc, char **argv) {
  7. if (argc < 3) {
  8. std::cout << "Missing input and output file names." << std::endl;
  9. std::cout << "Usage: ./benchmarks [input.json] [output.json]" << std::endl;
  10. return 1;
  11. }
  12. const std::string input = argv[1];
  13. const std::string output = argv[2];
  14. std::string path;
  15. uint64_t repetitions;
  16. std::vector<TaskData> args;
  17. std::vector<uint64_t> timing;
  18. std::ifstream is(input);
  19. ReadWorkDescription(args, path, repetitions, is);
  20. is.close();
  21. if (path == "hw") {
  22. timing = execute_dml_memcpy<dml::hardware>(args, repetitions);
  23. }
  24. else if (path == "sw") {
  25. timing = execute_dml_memcpy<dml::software>(args, repetitions);
  26. }
  27. else if (path == "auto") {
  28. timing = execute_dml_memcpy<dml::automatic>(args, repetitions);
  29. }
  30. else {
  31. std::cerr << "Path is neither hw/sw/auto." << std::endl;
  32. }
  33. std::ofstream os(output);
  34. WriteResultLog(args, path, timing, os);
  35. os.close();
  36. }