This contains my bachelors thesis and associated tex files, code snippets and maybe more. Topic: Data Movement in Heterogeneous Memories with Intel Data Streaming Accelerator
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  1. @misc{intel:dsaspec,
  2. author = {Intel},
  3. title = {{Intel® Data Streaming Accelerator Architecture Specification}},
  4. date = {2022-09-16},
  5. publisher = {Intel},
  6. howpublished = {\url{https://www.intel.com/content/www/us/en/content-details/671116/intel-data-streaming-accelerator-architecture-specification.html}},
  7. urldate = {2023-11-15}
  8. }
  9. @misc{intel:xeonbrief,
  10. author = {Intel},
  11. title = {{New Intel® Xeon® Platform Includes Built-In Accelerators for Encryption, Compression, and Data Movement}},
  12. date = {2022-12},
  13. publisher = {Intel},
  14. howpublished = {\url{https://www.intel.com/content/dam/www/central-libraries/us/en/documents/2022-12/storage-engines-4th-gen-xeon-brief.pdf}},
  15. urldate = {2023-11-15}
  16. }
  17. @misc{intel:xeonmaxbrief,
  18. author = {Intel},
  19. title = {{Intel® Xeon® CPU Max Series Product Brief}},
  20. date = {2023-01-06},
  21. publisher = {Intel},
  22. howpublished = {\url{https://www.intel.com/content/www/us/en/content-details/765259/intel-xeon-cpu-max-series-product-brief.html}},
  23. urldate = {2024-01-18}
  24. }
  25. @misc{intel:dsaguide,
  26. author = {Intel},
  27. title = {{Intel® Data Streaming Accelerator User Guide}},
  28. date = {2023-01-11},
  29. publisher = {Intel},
  30. howpublished = {\url{https://www.intel.com/content/www/us/en/content-details/759709/intel-data-streaming-accelerator-user-guide.html}},
  31. urldate = {2023-11-15}
  32. }
  33. @misc{intel:idxd-driver-repo,
  34. author = {Intel},
  35. title = {{Intel IDXD Driver for Linux Kernel}},
  36. publisher = {GitHub},
  37. howpublished = {\url{https://github.com/intel/idxd-driver}},
  38. urldate = {2024-01-07}
  39. }
  40. @misc{intel:libaccel-config-repo,
  41. author = {Intel},
  42. title = {{Intel IDXD User Space Application}},
  43. publisher = {GitHub},
  44. howpublished = {\url{https://github.com/intel/idxd-config}},
  45. urldate = {2024-01-07}
  46. }
  47. @misc{intel:dmldoc,
  48. author = {Intel},
  49. title = {{Intel Data Mover Library Documentation}},
  50. publisher = {GitHub},
  51. howpublished = {\url{https://intel.github.io/DML/documentation/api_docs/high_level_api.html}},
  52. urldate = {2024-01-07}
  53. }
  54. @ARTICLE{intel:analysis,
  55. author = {Reese Kuper and Ipoom Jeong and Yifan Yuan and Jiayu Hu and Ren Wang and Narayan Ranganathan and Nam Sung Kim},
  56. title = {{A Quantitative Analysis and Guideline of Data Streaming Accelerator in Intel® 4th Gen Xeon® Scalable Processors}},
  57. date = {2023-05},
  58. doi = {10.48550/arXiv.2305.02480}
  59. }
  60. @INPROCEEDINGS{atomics-cost-analysis,
  61. author={Schweizer, Hermann and Besta, Maciej and Hoefler, Torsten},
  62. booktitle={{2015 International Conference on Parallel Architecture and Compilation (PACT)}},
  63. title={{Evaluating the Cost of Atomic Operations on Modern Architectures}},
  64. year={2015},
  65. pages={445-456},
  66. doi={10.1109/PACT.2015.24}
  67. }
  68. @INPROCEEDINGS{shared-ptr-perf,
  69. author={T. Ku and N. Jung},
  70. booktitle={{Journal of Korea Game Society}},
  71. title={{Implementation of Lock-Free shared\_ptr and weak\_ptr for C++11 multi-thread programming}},
  72. year={2021},
  73. volume={21},
  74. number={1},
  75. pages={55-65},
  76. date = {2021-02-28},
  77. doi={10.7583/jkgs.2021.21.1.55.}
  78. }
  79. @misc{cppreference:shared-ptr,
  80. author = {cppreference.com},
  81. title = {{CPP Reference Entry on std::shared\_ptr<T>}},
  82. publisher = {cppreference},
  83. howpublished = {\url{https://en.cppreference.com/w/cpp/memory/shared_ptr}},
  84. urldate = {2024-01-17}
  85. }
  86. @misc{cppreference:atomic-wait,
  87. author = {cppreference.com},
  88. title = {{CPP Reference Entry on std::atomic<T>::wait}},
  89. publisher = {cppreference},
  90. howpublished = {\url{https://en.cppreference.com/w/cpp/atomic/atomic/wait}},
  91. urldate = {2024-01-18}
  92. }
  93. @misc{cppreference:atomic-notify-one,
  94. author = {cppreference.com},
  95. title = {{CPP Reference Entry on std::atomic<T>::notify\_one}},
  96. publisher = {cppreference},
  97. howpublished = {\url{https://en.cppreference.com/w/cpp/atomic/atomic/notify_one}},
  98. urldate = {2024-01-18}
  99. }
  100. @misc{cppreference:atomic-notify-all,
  101. author = {cppreference.com},
  102. title = {{CPP Reference Entry on std::atomic<T>::notify\_all}},
  103. publisher = {cppreference},
  104. howpublished = {\url{https://en.cppreference.com/w/cpp/atomic/atomic/notify_all}},
  105. urldate = {2024-01-18}
  106. }
  107. @misc{cppreference:atomic-exchange,
  108. author = {cppreference.com},
  109. title = {{CPP Reference Entry on std::atomic<T>::exchange}},
  110. publisher = {cppreference},
  111. howpublished = {\url{https://en.cppreference.com/w/cpp/atomic/atomic/exchange}},
  112. urldate = {2024-01-18}
  113. }
  114. @ARTICLE{atomic-wait-details,
  115. author = {Thomas Rodgers},
  116. title = {{Implementing C++20 atomic waiting in libstdc++}},
  117. publisher = {Red Hat Developer Blog},
  118. date = {2022-12-06},
  119. urldate = {2024-01-18},
  120. howpublished = {\url{https://developers.redhat.com/articles/2022/12/06/implementing-c20-atomic-waiting-libstdc}}
  121. }
  122. @misc{amd:programmers-manual,
  123. author = {AMD},
  124. publisher = {AMD},
  125. title = {{AMD64 Programmer's Manual Volume 2: System Programming}},
  126. date = {2016-12},
  127. urldate = {2024-01-18},
  128. howpublished = {\url{https://support.amd.com/TechDocs/24593.pdf}}
  129. }
  130. @misc{intel:programmers-manual,
  131. author = {Intel},
  132. publisher = {Intel},
  133. title = {{Intel 64 and IA-32 Architectures Software Developer's Manual Volume 3A: System Programming Guide, Part 1}},
  134. date = {2016-12},
  135. urldate = {2024-01-18},
  136. howpublished = {\url{https://support.amd.com/TechDocs/24593.pdf}}
  137. }
  138. @INPROCEEDINGS{hbm-arch-paper,
  139. author={Jun, Hongshin and Cho, Jinhee and Lee, Kangseol and Son, Ho-Young and Kim, Kwiwook and Jin, Hanho and Kim, Keith},
  140. booktitle={2017 IEEE International Memory Workshop (IMW)},
  141. title={HBM (High Bandwidth Memory) DRAM Technology and Architecture},
  142. year={2017},
  143. pages={1-4},
  144. doi={10.1109/IMW.2017.7939084}
  145. }
  146. @misc{man-libnuma,
  147. author = {Debian},
  148. publisher = {Debian},
  149. title = {{Debian manpage 3 for libnuma-dev}},
  150. urldate = {2024-01-21},
  151. howpublished = {\url{https://manpages.debian.org/bookworm/libnuma-dev/numa.3.en.html}}
  152. }
  153. @misc{lenovo:dsa,
  154. author = {Adrian Huang},
  155. publisher = {Lenovo},
  156. title = {{Enabling Intel Data Streaming Accelerator on Lenovo ThinkSystem Servers}},
  157. urldate = {2022-04-18},
  158. howpublished = {\url{https://lenovopress.lenovo.com/lp1582.pdf}}
  159. }
  160. @misc{thesis-repo,
  161. author = {Anatol Constantin Fürst},
  162. publisher = {Anatol Constantin Fürst},
  163. title = {{Accompanying Thesis Repository}},
  164. howpublished = {\url{https://git.constantin-fuerst.com/constantin/bachelor-thesis}}
  165. }
  166. @misc{lenovo:hbm,
  167. author = {Sam Kuo, Jimmy Cheng},
  168. publisher = {Lenovo},
  169. title = {{Implementing High Bandwidth Memory and Intel Xeon Processors Max Series on Lenovo ThinkSystem Servers}},
  170. date = {2023-06-26},
  171. howpublished = {\url{https://lenovopress.lenovo.com/lp1738.pdf}},
  172. urldate = {2024-01-21}
  173. }
  174. @misc{intel:maxtuning,
  175. author = {Intel},
  176. publisher = {Intel},
  177. title = {{Intel® Xeon® CPU Max Series Configuration and Tuning Guide}},
  178. date = {2023-08},
  179. howpublished = {\url{https://cdrdv2-public.intel.com/787743/354227-intel-xeon-cpu-max-series-configuration-and-tuning-guide-rev3.pdf}},
  180. urldate = {2024-01-21}
  181. }
  182. @misc{dimes-prefetching,
  183. author = {André Berthold and Anna Bartuschka and Dirk Habich and Wolfgang Lehner and Horst Schirmeier},
  184. title = {{Towards Query-Driven Prefetching to Optimize Data Pipelines in Heterogeneous Memory Systems}},
  185. date = {2023},
  186. howpublished = "unpublished"
  187. }
  188. @misc{microsoft:numa-malloc,
  189. publisher = {Microsoft},
  190. title = {{Allocating Memory from a NUMA Node}},
  191. date = {2021-07-01},
  192. howpublished = {\url{https://learn.microsoft.com/en-us/windows/win32/memory/allocating-memory-from-a-numa-node}},
  193. urldate = {2024-01-28}
  194. }
  195. @misc{kingston:ddr5-spec-overview,
  196. author = {Kingston},
  197. title = {{DDR5 memory standard: An introduction to the next generation of DRAM module technology}},
  198. date = {2024-01},
  199. howpublished = {\url{https://www.kingston.com/en/blog/pc-performance/ddr5-overview}},
  200. urldate = {2024-02-04}
  201. }
  202. @ARTICLE{bench:heterogeneous-communication,
  203. author={Thune, Andreas and Reinemo, Sven-Arne and Skeie, Tor and Cai, Xing},
  204. journal={IEEE Transactions on Parallel and Distributed Systems},
  205. title={Detailed Modeling of Heterogeneous and Contention-Constrained Point-to-Point MPI Communication},
  206. year={2023},
  207. volume={34},
  208. number={5},
  209. pages={1580-1593},
  210. keywords={Bandwidth;Sockets;Benchmark testing;Size measurement;Protocols;Multicore processing;Computational modeling;Intra-node communication;performance modeling;point-to-point MPI communication},
  211. doi={10.1109/TPDS.2023.3253881}
  212. }
  213. @misc{xeonmax-peakthroughput,
  214. author = "André Berthold and Anna Bartuschka",
  215. title={{Throughput Benchmarks for CPU}},
  216. date = "2023",
  217. howpublished = "personal communication"
  218. }