This contains my bachelors thesis and associated tex files, code snippets and maybe more. Topic: Data Movement in Heterogeneous Memories with Intel Data Streaming Accelerator
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Constantin Fürst 16e47a862f allocate the correct amount of chunks for caching (missing was the run count) and add them to the queue for each run 11 months ago
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dml-test add error print output for dml status code 1 year ago
tests add DML test binaries 1 year ago
tests_mt add DML test binaries 1 year ago