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This contains my bachelors thesis and associated tex files, code snippets and maybe more. Topic: Data Movement in Heterogeneous Memories with Intel Data Streaming Accelerator
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bachelor-thesis/qdp_project/evaluation-results/current
Constantin Fürst 1bbfbcf3e0
reformulate unclear passages and modify section on applicatino to qdp to link with the weak-wait,weak-access,pf section introduced to chapt4 in previous commit 		10 months ago
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qdp-xeonmax-distprefetch-tca1-tcb1-tcj1-tmul32-wl4294967296-cs8388608.csv change config to allow 64 threads for stage 1 and 32 for stage 2 in all benchmarks 11 months ago
qdp-xeonmax-dram-tca2-tcb0-tcj1-tmul32-wl4294967296-cs2097152.csv change config to allow 64 threads for stage 1 and 32 for stage 2 in all benchmarks 11 months ago
qdp-xeonmax-hbm-tca4-tcb0-tcj1-tmul32-wl4294967296-cs2097152.csv change config to allow 64 threads for stage 1 and 32 for stage 2 in all benchmarks 11 months ago
qdp-xeonmax-prefetch-tca1-tcb1-tcj1-tmul32-wl4294967296-cs8388608.csv change config to allow 64 threads for stage 1 and 32 for stage 2 in all benchmarks 11 months ago