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This contains my bachelors thesis and associated tex files, code snippets and maybe more. Topic: Data Movement in Heterogeneous Memories with Intel Data Streaming Accelerator
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Constantin Fürst 282f7c7736
improve clarity for c5 explanation of why weak wait and access are required, add section labeling to the section containing this paragraph 		11 months ago
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design-classdiagram.xml redo all possible figures in svalable pdf and include these, provide longer image captions and apply some misc recommendations from andre 11 months ago
sequenzdiagramm-waitoncompletion.xml redo all possible figures in svalable pdf and include these, provide longer image captions and apply some misc recommendations from andre 11 months ago
structo-benchmark-v2-inner.nsd redo the structograms for the benchmark code 11 months ago
structo-benchmark-v2-inner.nsd.bak redo the structograms for the benchmark code 11 months ago
structo-benchmark-v2-inner.svg redo the structograms for the benchmark code 11 months ago
structo-benchmark-v2.nsd redo the structograms for the benchmark code 11 months ago
structo-benchmark-v2.nsd.bak redo the structograms for the benchmark code 11 months ago
structo-benchmark-v2.svg redo the structograms for the benchmark code 11 months ago
structo-benchmark.nsd redo all possible figures in svalable pdf and include these, provide longer image captions and apply some misc recommendations from andre 11 months ago
structo-cachedata-waitoncompletion.nsd redo all possible figures in svalable pdf and include these, provide longer image captions and apply some misc recommendations from andre 11 months ago
structo-dmlmemcpy.nsd redo all possible figures in svalable pdf and include these, provide longer image captions and apply some misc recommendations from andre 11 months ago