This contains my bachelors thesis and associated tex files, code snippets and maybe more. Topic: Data Movement in Heterogeneous Memories with Intel Data Streaming Accelerator
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Constantin Fürst 34f7aca50a correct bad thread timing storage size set which should have been 1 from the start and not 0 11 months ago
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modules add project 'offloading cacher' and function declarations for the cacher in its header file 12 months ago