This contains my bachelors thesis and associated tex files, code snippets and maybe more. Topic: Data Movement in Heterogeneous Memories with Intel Data Streaming Accelerator

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bachelor-thesis/qdp_project/src

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Constantin Fürst 714bc3c1ec modify explanation of dsa-wq submission to not include so much detail on the actual instructions. remove these from the glossary too, improve gls for API		10 months ago
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utils	handle memory allocation outside of the cache, pre-allocate in benchmark and memset to hopefully guarantee no pagefaults will be encountered	11 months ago
Benchmark.cpp	allocate the correct amount of chunks for caching (missing was the run count) and add them to the queue for each run	11 months ago
Configuration.hpp	change config to allow 64 threads for stage 1 and 32 for stage 2 in all benchmarks	11 months ago