This contains my bachelors thesis and associated tex files, code snippets and maybe more. Topic: Data Movement in Heterogeneous Memories with Intel Data Streaming Accelerator
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Constantin Fürst 718ce39693 plot the throughput benchmark for source node 0 and destination nodess {8,11,12,15} only and as a bar plot for use in thesis 11 months ago
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dml-test add error print output for dml status code 1 year ago
tests add DML test binaries 1 year ago
tests_mt add DML test binaries 1 year ago