This contains my bachelors thesis and associated tex files, code snippets and maybe more. Topic: Data Movement in Heterogeneous Memories with Intel Data Streaming Accelerator
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Constantin Fürst 9c7f34d4a6 add section on weak wait, weak access and pf handling to design chapter 10 months ago
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perf.new.svg restructure evaluation results, add new results with out of cache allocation 11 months ago
perf.svg restructure evaluation results, add new results with out of cache allocation 11 months ago
qdp-xeonmax-dram-tca2-tcb0-tcj1-tmul16-wl4294967296-cs2097152.csv restructure evaluation results, add new results with out of cache allocation 11 months ago
qdp-xeonmax-prefetch-tca2-tcb1-tcj1-tmul16-wl4294967296-cs8388608.csv restructure evaluation results, add new results with out of cache allocation 11 months ago