This contains my bachelors thesis and associated tex files, code snippets and maybe more. Topic: Data Movement in Heterogeneous Memories with Intel Data Streaming Accelerator
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#pragma once
#include <iostream>
#include <atomic>
#include <memory>
#include <vector>
#include <dml/dml.hpp>
namespace dsacache {
class Cache;
// the cache task structure will be used to submit and
// control a cache element, while providing source pointer
// and size in bytes for submission
//
// then the submitting thread may wait on the atomic "result"
// which will be notified by the cache worker upon processing
// after which the atomic-bool-ptr active will also become valid
class CacheData {
public:
using dml_handler = dml::handler<dml::mem_copy_operation, std::allocator<uint8_t>>;
private:
uint8_t* src_;
size_t size_;
std::atomic<int32_t>* active_;
protected:
std::atomic<uint8_t*>* cache_;
uint8_t* incomplete_cache_;
std::unique_ptr<std::vector<dml_handler>> handlers_;
friend Cache;
public:
CacheData(uint8_t* data, const size_t size);
CacheData(const CacheData& other);
~CacheData();
void Deallocate();
void WaitOnCompletion();
uint8_t* GetDataLocation() const;
bool Active() const;
};
}
inline void dsacache::CacheData::WaitOnCompletion() {
if (handlers_ == nullptr) {
std::cout << "[-] Waiting on cache-var-update for CacheData 0x" << std::hex << (uint64_t)src_ << std::dec << std::endl;
cache_->wait(nullptr);
std::cout << "[+] Finished waiting on cache-var-update for CacheData 0x" << std::hex << (uint64_t)src_ << std::dec << std::endl;
}
else {
std::cout << "[-] Waiting on handlers for CacheData 0x" << std::hex << (uint64_t)src_ << std::dec << std::endl;
for (auto& handler : *handlers_) {
auto result = handler.get();
// TODO: handle the returned status code
}
handlers_ = nullptr;
std::cout << "[+] Finished waiting on handlers for CacheData 0x" << std::hex << (uint64_t)src_ << std::dec << std::endl;
cache_->store(incomplete_cache_);
cache_->notify_all();
}
}
dsacache::CacheData::CacheData(uint8_t* data, const size_t size) {
std::cout << "[-] New CacheData 0x" << std::hex << (uint64_t)data << std::dec << std::endl;
src_ = data;
size_ = size;
active_ = new std::atomic<int32_t>(1);
cache_ = new std::atomic<uint8_t*>();
incomplete_cache_ = nullptr;
handlers_ = std::make_unique<std::vector<dml_handler>>();
}
dsacache::CacheData::CacheData(const dsacache::CacheData& other) {
std::cout << "[-] Copy Created for CacheData 0x" << std::hex << (uint64_t)other.src_ << std::dec << std::endl;
active_ = other.active_;
const int current_active = active_->fetch_add(1);
src_ = other.src_;
size_ = other.size_;
cache_ = other.cache_;
incomplete_cache_ = nullptr;
handlers_ = nullptr;
}
dsacache::CacheData::~CacheData() {
std::cout << "[-] Destructor for CacheData 0x" << std::hex << (uint64_t)src_ << std::dec << std::endl;
// due to fetch_sub returning the preivously held value
// we must subtract one locally to get the current value
const int32_t v = active_->fetch_sub(1) - 1;
// if the returned value is zero or lower
// then we must execute proper deletion
// as this was the last reference
if (v <= 0) {
std::cout << "[!] Full Destructor for CacheData 0x" << std::hex << (uint64_t)src_ << std::dec << std::endl;
Deallocate();
delete active_;
delete cache_;
}
}
void dsacache::CacheData::Deallocate() {
std::cout << "[!] Deallocating for CacheData 0x" << std::hex << (uint64_t)src_ << std::dec << std::endl;
numa_free(cache_, size_);
cache_ = nullptr;
incomplete_cache_ = nullptr;
}
uint8_t* dsacache::CacheData::GetDataLocation() const {
return cache_->load();
}
bool dsacache::CacheData::Active() const {
return active_->load() > 0;
}