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This contains my bachelors thesis and associated tex files, code snippets and maybe more. Topic: Data Movement in Heterogeneous Memories with Intel Data Streaming Accelerator
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bachelor-thesis/thesis/content
Constantin Fürst d61284f4f1
rewrite with todos for design chapter 		10 months ago
..
00_title.tex handle cleardoublepage in bachelor.tex and not the chapter files themselves 11 months ago
01_disclaimer.tex this is a bachelors and not a masters thesis - adapt disclaimer accordingly 10 months ago
02_abstract.tex start processing todos for abstract,intro and state | introduce glossary entries for nvram and remote mem, add image for hbm design layout, other smaller changes like rewrites 10 months ago
10_introduction.tex start processing todos for abstract,intro and state | introduce glossary entries for nvram and remote mem, add image for hbm design layout, other smaller changes like rewrites 10 months ago
20_state.tex bottom-align images that slid above chapter title 10 months ago
30_performance.tex modify throughput scaling to display factor-of-baseline and not scaling-factor 10 months ago
40_design.tex rewrite with todos for design chapter 10 months ago
50_implementation.tex remove unnecessary reference to cppref for implementation chapter 10 months ago
60_evaluation.tex use new gls entries for nvram and remote memory in chapters 6 and 7 10 months ago
70_conclusion.tex use new gls entries for nvram and remote memory in chapters 6 and 7 10 months ago