This contains my bachelors thesis and associated tex files, code snippets and maybe more. Topic: Data Movement in Heterogeneous Memories with Intel Data Streaming Accelerator
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Constantin Fürst e429e8fd40 adapt barrier waiting points, add timings to thread execution 11 months ago
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design-classdiagram.xml redo all possible figures in svalable pdf and include these, provide longer image captions and apply some misc recommendations from andre 11 months ago
sequenzdiagramm-waitoncompletion.xml redo all possible figures in svalable pdf and include these, provide longer image captions and apply some misc recommendations from andre 11 months ago
structo-benchmark.nsd redo all possible figures in svalable pdf and include these, provide longer image captions and apply some misc recommendations from andre 11 months ago
structo-cachedata-waitoncompletion.nsd redo all possible figures in svalable pdf and include these, provide longer image captions and apply some misc recommendations from andre 11 months ago
structo-dmlmemcpy.nsd redo all possible figures in svalable pdf and include these, provide longer image captions and apply some misc recommendations from andre 11 months ago