This contains my bachelors thesis and associated tex files, code snippets and maybe more. Topic: Data Movement in Heterogeneous Memories with Intel Data Streaming Accelerator
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Constantin Fürst fda771c239 section naming changes and slight extension of intro-paragraphs to them for chapter 5 11 months ago
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allocation-issues restructure evaluation results, add new results with out of cache allocation 11 months ago
current change config to allow 64 threads for stage 1 and 32 for stage 2 in all benchmarks 11 months ago
distprefetch restructure evaluation results folder again 11 months ago
old-bench change config to allow 64 threads for stage 1 and 32 for stage 2 in all benchmarks 11 months ago
outofcacheallocation restructure evaluation results folder again 11 months ago