This contains my bachelors thesis and associated tex files, code snippets and maybe more. Topic: Data Movement in Heterogeneous Memories with Intel Data Streaming Accelerator
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Constantin Fürst 24bdccd1e3 rewrite the benchmarker to not allocate the memory regions each iteration but before the test runs, also flush cache each iteration using dml-operation, also set dsa-device using the parameter to submit and not using libnuma assignment 11 months ago
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json@9cca280a4d restructure of directory layout 1 year ago
dml-helper.hpp fix include naming 1 year ago
task-data.hpp wait less for task launch and dont write iterations complete out 11 months ago