This contains my bachelors thesis and associated tex files, code snippets and maybe more.
Topic: Data Movement in Heterogeneous Memories with Intel Data Streaming Accelerator
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Constantin Fürst
24bdccd1e3
rewrite the benchmarker to not allocate the memory regions each iteration but before the test runs, also flush cache each iteration using dml-operation, also set dsa-device using the parameter to submit and not using libnuma assignment
11 months ago
..
00_title.tex
handle cleardoublepage in bachelor.tex and not the chapter files themselves
11 months ago
01_disclaimer.tex
slight restructuring of the thesis, part of formulating the contents
12 months ago
02_abstract.tex
add todos to unfinished parts of the thesis
11 months ago
10_introduction.tex
handle cleardoublepage in bachelor.tex and not the chapter files themselves
11 months ago
20_state.tex
fix some compilation-blocking syntax mistakes, improve usage of glossary with short descriptions, use glossary for titles and in figure captions with explicit long/short entries
11 months ago
30_performance.tex
fix some compilation-blocking syntax mistakes, improve usage of glossary with short descriptions, use glossary for titles and in figure captions with explicit long/short entries
11 months ago
40_design.tex
fix some compilation-blocking syntax mistakes, improve usage of glossary with short descriptions, use glossary for titles and in figure captions with explicit long/short entries
11 months ago
50_implementation.tex
fix some compilation-blocking syntax mistakes, improve usage of glossary with short descriptions, use glossary for titles and in figure captions with explicit long/short entries
11 months ago
60_evaluation.tex
begin writing evaluation chapter
11 months ago
70_conclusion.tex
update the futurework list in the notes for writing chapter 7
11 months ago
Constantin Fürst
24bdccd1e3