This contains my bachelors thesis and associated tex files, code snippets and maybe more. Topic: Data Movement in Heterogeneous Memories with Intel Data Streaming Accelerator
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Constantin Fürst 24bdccd1e3 rewrite the benchmarker to not allocate the memory regions each iteration but before the test runs, also flush cache each iteration using dml-operation, also set dsa-device using the parameter to submit and not using libnuma assignment 11 months ago
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color.tex add thesis template 1 year ago
newcommands.tex fix some compilation-blocking syntax mistakes, improve usage of glossary with short descriptions, use glossary for titles and in figure captions with explicit long/short entries 11 months ago
packages.tex write section 4.2 on cache design 11 months ago
style.tex slight restructuring of the thesis, part of formulating the contents 12 months ago