This contains my bachelors thesis and associated tex files, code snippets and maybe more. Topic: Data Movement in Heterogeneous Memories with Intel Data Streaming Accelerator

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Constantin Fürst 5e30a370ce finish first stage of caching implementation and provide a rudimentary test function in the main		12 months ago
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bachelor-aufgabe.pdf	remove todos and todo page from the tex files, remove test-texcode, add some structure points	12 months ago
dsa-internal-block-diagram.png	add dsa hw and sw block diagrams	12 months ago
dsa-software-architecture.png	add dsa hw and sw block diagrams	12 months ago