This contains my bachelors thesis and associated tex files, code snippets and maybe more. Topic: Data Movement in Heterogeneous Memories with Intel Data Streaming Accelerator
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Constantin Fürst 1f055d84ed write section about dsa hw/sw architecture 12 months ago
benchmarks use uniform colormap in the plots and use separate output folder for the plots 12 months ago
test-project add error print output for dml status code 1 year ago
thesis write section about dsa hw/sw architecture 12 months ago
.gitignore add tex makefile to the project 1 year ago
.gitmodules restructure of directory layout 1 year ago
README.md Initial commit 1 year ago

README.md

bachelor-thesis